1. Field of the Invention
The present invention relates to a thin film transistor, a method of manufacturing the thin film transistor, and a display device.
2. Description of Related Art
High performances have been required of thin film transistors (hereinafter referred to as “TFTs”) used in organic EL display devices or liquid crystal display devices along with an increase in image quality of display devices. In particular, in the organic EL display devices, how to control analog signals is important. TFTs used in an analogue circuit need to have stability in a saturation region of current-voltage characteristics. Incidentally, the current-voltage characteristics refer to drain current (Id)-source-drain voltage (Vds) characteristics.
FIG. 10 is a graph showing a relation of Id-Vds characteristics. The graph illustrates an amount of a current Id flowing through a drain region of a TFT relative to a voltage Vds applied between a source region and a drain region, in which different values of a voltage Vgs applied between a source region and a gate electrode of the TFT are graphed.
Here, a relation between Id and Vds in a saturation region is represented by Expression (1):Id=β/2(Vgs−Vth)2(1+λVds)  (1)                Vgs: source-gate voltage        Vth: threshold voltage        β: constant        
Regarding an ideal TFT, λ=0 in Expression (1).
Accordingly, as represented by the chain line of FIG. 10, Id is uniquely determined based on Vgs regardless of changes in Vds. Therefore, a stable Id output can be obtained by controlling Vgs. However, in an actual TFT, λ is not 0 as represented by the solid line of FIG. 10, and an Id output is not constant even in the saturation region and is changed along with the change in Vds. Therefore, even in the saturation region, the line of Id-Vds characteristics is sloped. The dotted lines show extended lines from the slope of expression (1). The dotted lines cross the Vds axis at an intersection point. A difference of voltage between the intersection point and Vds origin is 1/λ, and this value corresponds to an early voltage in a bipolar transistor.
In the bipolar transistor, if collector-emitter voltage (Vce: Vds in the TFT) increases, a depletion layer in a collector junction area (an area around a drain of the TFT) extends, an effective base width (effective channel length in the TFT) is reduced, and a collector current (Ic: Id in the TFT) increases. This phenomenon is called an Early effect, and a Vce value at a point where the Ic-Vce line is extrapolated to Ic=0 is called early voltage. As the current-voltage characteristics of the TFT applied to an analog circuit, it is necessary to increase the apparent early voltage (1/λ), that is, to approximate λ to 0 to thereby stabilize the saturation region.
Referring now to FIG. 11, a mechanism that λ increases and the saturation region is changed is described in detail. FIG. 11 is a sectional view of the structure of a conventional TFT. In a conventional TFT 20, an insulation protective layer 22 is formed on a substrate 21, and a semiconductor layer 23 including a source region 231, a channel region 232, and a drain region 233 is formed on the insulation protective layer 22. Further, a gate insulating film 24 is formed on the semiconductor layer 23, and a gate electrode 25 is formed to cover the channel region 232 on the gate insulating film 24.
The TFT of FIG. 11 is, for example, an n-channel TFT. First of all, a voltage Vgs higher than a threshold voltage Vth is applied to the gate electrode 25. As a result, carriers are generated in an inversion layer of the channel region 232 near the gate electrode 25. In the case of the n-channel TFT, the carriers are electrons, which move in a channel while being accelerated due to an electric field generated between the source region 231 drain region 233. The accelerated electrons collide against atoms in the channel region 232 to generate a pair of hole and electron. In the generated hole-and-electron pairs, the electrons are absorbed to the drain region 233 along the electric field. Some of the holes, which are blocked by an energy barrier of the source region 231, are accumulated in the channel region 232 far from the gate electrode 25, that is, accumulated on the insulation protective layer 22 side. The accumulated holes lead to a back-gate potential, and Vth is lowered. As a result, a phenomenon that Id is further increased and λ increases takes place.
To avoid such phenomenon, the structure for abstracting holes accumulated in a channel with an opposite conductivity layer adjacent to the channel is disclosed in Japanese Unexamined Patent Application Publication No. 2003-140570 (Tsutsumi).
As described above, in the conventional TFT, a potential of the channel region 232 in the semiconductor layer 23 is not fixed. That is, as Vds increases, carriers are accelerated to generate a larger number of hole-and-electron pairs. Further, generation of holes as minority carriers generated due to saturation region operations is promoted to increase a potential of the silicon substrate. Therefore, Id increases along with an increase in Vds, with the result that λ increases to impair TFT stability in the saturation region. In the case of using a TFT array substrate having arrayed TFTs, for example, in the organic EL display device or the liquid crystal display device, each TFT becomes unstable, resulting in a problem that image quality of the display device varies. Further, even in the case of using the structure for abstracting holes accumulated in the channel with an opposite conductivity layer adjacent to the channel, the opposite conductivity layer is outside the gate electrode region, and a distance between a source-drain region where electrons move and the opposite conductivity layer increases. Thus, an effect of abstracting holes is small. There is another problem that a TFT area increases due to areas of the opposite conductivity layer and its wiring layer.
The present invention has been accomplished with a view to solving the above problems. The invention aims at providing a thin film transistor and a display device, which enable stable current-voltage characteristics.